Memory Sw Engineer

This work would involve collaborating with cross organizational memory development engineers (ASIC, PCB, Characterization, Modelling), memory subsystem PMs as well as engagements with global execution team to enable memory subsystem for IBM POWER and Z servers systems group roadmap.What to expect?As part of the Memory SW infra team develop and debug FW in C/ C++ for server memory subsystem initialization and operation.Participate in the development of C or Python based utility software and GUIs that would be used for enabling memory characterization activities and for automating characterization/ post silicon validation work flow.Participate in design flow discussions, code review meetings, and following team specific design and coding guidelines.