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Position RequirementsBTech Electrical/Computer Engineering (or similar degree) or higher.Experience on Cadence tools a plus.Understanding of Static timing AnalysisUnderstanding of Layout, LVS, Parasitic extraction and Simulation.Understanding of Interconnect Resistance, Capacitance, Inductance and their effects on circuit behavior.Strong debug and problem-solving skillsAbility to clearly communicate technical challenges.Working with global (US, west coast and each coast) teams, which work in different time-zones
Position Description (what the role does)Main technical interface for customer for Transistor and Cell level extraction support.Work closely with R&D and Field Application Engineers in Parasitic Extraction area.Drive and support Customer evaluations.
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