At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Requirements:* Strong expertise in Verilog, HVL( SV / Specman e) with UVM/OVM/eRM methodology
* Experience in functional coverage/code coverage/assertions development and closure.
* Experience in test plan creation.
* Exposure to PCIe and LPDDR verification.
Additional Job Description
* Strong debug skills
* Should be process oriented and have a passion for scripting/automation
* Should be a good team playe
We’re doing work that matters. Help us solve what others can’t.